The present invention relates to fabrication of semiconductor devices, and in particular to optical proximity correction of distortions that occur during photolithography.
Optical lithography, or photolithography, is an important means of IC production. The demise of optical lithography for wafer fabrication has been predicted repeatedly, but has never come about. The engineering problems arising in optical lithography are continually addressed and overcome, which contributes to the longevity of the art. As reticle and wafer feature sizes shrink to the submicron level, photolithography faces new engineering problems. Optical proximity correction has been developed to deal with the diffraction and interference effects that occur during the process, but this method of correction faces its own problems, as will be discussed below.
Photolithography is a photographic process used to place patterns for features on a flat wafer surface. A primary component of the photolithographic process is the reticle. A reticle is made from a transparent plate covered with a pattern of material that is opaque to the particular wavelength(s) of radiation used. The pattern corresponds to the features for a specific layer of the integrated circuit design.
A reticle is typically made by exposing, or writing, the required circuit pattern in a resist layer spun on top of a chromium layer. The resist is developed, forming the pattern which serves as a mask for etching the pattern into the chrome layer. The resist layer is then removed. Mask features are usually measured for accuracy and tolerance, then cleaned.
In recent years reticles have become a critical part of the photolithography process because of the need for and difficulty in obtaining smaller and smaller pattern specifications. These tolerances can measure in the tens of nanometers, and pattern data volume is often measured in gigabytes. Reticle pattern errors that were once considered insignificant, such as proximity effects, resist heating during pattern generation, and feature displacement due to gravitational effects on the mask substrate, are now significant parts of photomask fabrication.
In the photolithography process, the reticle is placed between the radiation source and the wafer. During exposure, the radiation is directed through the reticle, which projects the pattern onto the surface of the wafer. This transfers the pattern from the reticle to the wafer surface.
The wafer surface is covered with a photosensitive material (called a photoresist, or resist). To transfer a pattern, the radiation must strike a photosensitive material, and it must change the properties of that material in such a way that a replica of the mask is left on the surface of the wafer after the photolithography process is complete.
A resist generally contains a photoactive compound (PAC) that changes properties after exposure to light. For instance, in a positive resist, the PAC acts as an inhibitor before exposure that slows the rate at which the resist dissolves when placed in developing solution. After exposure, the PAC becomes a sensitizer, increasing the rate at which the resist dissolves in developer.
Positive resist materials thus become more soluble when exposed to light. When developed, the exposed regions are removed, leaving the pattern corresponding to the opaque regions of the reticle. Negative resists become less soluble when exposed, and leave a pattern corresponding to the transparent regions of the reticle.
Whichever type of resist material is used, a mask pattern is left on the wafer after developing. The remaining mask is used to etch the underlying layer, transferring the original pattern to the intended wafer layer. The resist layer is then removed.
Recently there has been some attempt to develop optical proximity correction (OPC) for the mask writers. The mask manufacturers apply some form of correction to the desired pattern so that what is produced on the reticle is closer to what was originally designed. These attempts at correction take into account the distortions inherent in the reticle manufacturing process, which are caused by optical and lithographic effects, and etch and development properties of the resist used to make the reticle.
As device sizes reach the submicron level, optical proximity effects cause distortion in the wafer patterns. Though these effects have always been present, they did not pose a problem with larger scale devices. However, as features shrink to sizes near the wavelength of radiation used in photolithography, diffraction and other optical effects become more important and can wreak havoc with designs. Designers can compensate for these effects with optical proximity correction, a technique that pre-distorts design patterns to compensate for systematic distortion introduced during fabrication.
OPC involves modification to the design pattern to compensate for changes in feature shape and size that occur during pattern transfer from the reticle to the wafer. When the pattern is transferred from the reticle to the wafer, several effects introduce distortion into the pattern. These distortions include line-width variations dependent on pattern density, corner rounding, and line-end shortening. The changes to the pattern can create bad connections or cause devices to operate at less than optimal speed. Causes for the distortion include reticle pattern infidelity, optical proximity effects, diffraction and interference, and diffusion and loading effects during resist and etch processing.
OPC makes small changes to the IC pattern that are designed to anticipate and correct for these distortions. For instance, line end shortening is corrected by extending the line using a hammerhead shape that results in a line in the resist that more closely resembles the originally intended layout. Corner rounding is corrected by adding (or subtracting) serif shapes from corners. Determining exactly what corrections to make is an extremely complicated process that depends on neighboring geometries and process parameters.
Two current methods for calculating the required corrections are the rule-based and model-based approaches. The rule-based approach uses a lookup table to determine a correction bias for the pattern. Spacing between features and feature sizes and shapes are measured, which correspond to a particular degree of correction in the lookup table. A rule-based approach is simpler to implement and the changes to the pattern are easier to control. However, certain situations may not be represented in the rules and improper corrections may be made.
Model-based approaches use an iterative distortion of the design pattern. A model predicts the effects of the distortions occurring during wafer patterning, and modifies the design pattern to correct for these distortions. The pattern that would result from the modified design pattern is then modeled and compared to the desired pattern. This process typically undergoes several iterations until the modified pattern produces a result that matches the input pattern. A model based approach can usually cover all situations, but is generally slower to correct because of the required iterative process.
Modeling offers a way to characterize and systematically quantify relationships in optical lithography. Modeling and computer simulation often make fabrication efforts much more effective, and feedback from fabrication facility work can in turn improve modeling.
Lithography models simulate the basic steps of image formation, resist exposure, post-exposure bake diffusion, and development to obtain a final resist profile. Simulation consists of representing physical interactions within the lithography process using mathematical equations. More details on modeling and photolithography can be found in the Handbook of Microlithography, Micromachining, and Microfabrication (P. Rai-Choudhury, ed., SPIE Optical Engineering Press, 1997), which is hereby incorporated by reference.
FIG. 1 shows an example of a model based OPC approach. A starting design pattern is input into a wafer pattern model that predistorts the design pattern to compensate for changes that will occur to the pattern during transfer from the reticle to the wafer (Step 1). This produces a Wafer Pattern Image (Step 2), which is compared to the reference pattern (Step 3). If the design criteria are met (meaning the pattern resulting in the wafer sufficiently resembles the intended pattern) then the process ends (Step 4). If not, then the pattern is modified in order to account for differences between the wafer pattern image and the intended pattern (Step 5). This results in a modified design pattern (Step 6), which is used as the new input to the Wafer Pattern Model (Step 7). The process repeats until the Wafer Pattern Image sufficiently resembles the reference pattern.
Though OPC has addressed many engineering problems that arise in photolithography, the advancement of the art has brought on new problems due to the ever decreasing size requirements. At present, OPC, mask pattern pre-processing, and reticle inspection are handled separately with little if any interaction between these three essential processes. In each there is some processing of pattern data to account for limitations in the particular process. It is therefore an object of the presently disclosed innovations to improve the quality of OPC in general, and specifically to improve the proximity correction process, design pattern verification, and reticle inspection.
Improved Optical Proximity Correction
The present application discloses various improvements to the OPC process. In particular, the optical proximity correction process is improved by modeling the changes caused during the transfer of the design pattern to the reticle (called a mask patterning model) and incorporating this model in the OPC. The resulting innovative OPC comprehends the limitations of the mask writing tool and produces a pattern that is optimized for both the mask writing process and the wafer lithography process. The final pattern produced by this improved process will create a modified design pattern that will produce the desired pattern on the wafer, rather than a pattern which will have uncorrected distortion by the time it appears on the reticle.
Verification of the modified design pattern is improved by applying the mask patterning model and the wafer patterning model to the verification process. The mask patterning model and the wafer patterning model are successively (or simultaneously) applied to the modified design pattern, which produces a pattern which can be checked with existing design rules, rather than generating a new set of rules for comparison. The pattern generated by the innovative process (called a wafer pattern image) can be converted to layout data and checked with existing or slightly modified design rules. Alternatively, the wafer pattern image can be compared directly to the reference layer of the wafer design.
Finally, the reticle inspection process is improved by incorporating the limitations of the inspection tool itself into the reticle inspection process. The mask patterning model and a model comprehending the limitations of the inspection tool are applied to the modified design pattern to produce a reticle inspection image. Rather than comparing the reticle to the pattern used to write the reticle, which would necessarily generate defects due to unaccounted for errors in reticle manufacturing and inspection tool limitations, the reticle is compared to a reticle inspection image. This image may also be converted to a layout file for comparison with the reticle. This allows the inspection tool to be used at its highest resolution to catch real defects, while modifications added to correct for defects arising in the reticle manufacturing process are accounted for by the mask patterning model, and inspection tool limitations are accounted for by the mask inspection model. Thus if the pattern was written correctly, the inspection will find no faults.
The disclosed innovations, in various embodiments, provide one or more of at least the following advantages:
the optical proximity correction process integrates the reticle manufacturing process, producing a pattern that compensates for errors introduced not only in the wafer fabrication steps, but also the reticle fabrication steps;
the modified design pattern verification can be performed using the usual or only slightly modified design rules;
reticle inspection tools can be used at their highest resolution;
the reticle inspection process comprehends the limitations of the inspection tool.